1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device. More particularly, the invention relates to a method of forming a pattern in a semiconductor device using a self-align double patterning method.
2. Description of the Related Art
Fine patterns should be formed for high-integration semiconductor devices. The size of devices should be reduced to form more devices in a give area. For this, the pitch of a pattern (the sum of the width and space width of a pattern) is to be reduced. As the design rule is drastically reduced, finer patterns are required in forming semiconductor devices.
However, it is difficult to form fine patterns in a semiconductor device using a conventional photolithography process due to the resolution limit of the photolithography process.
Technology suitable for forming various types of patterns, e.g., line patterns, pad patterns, and a contact hole patterns, including patterns having different patterns are desired.